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GOP level parallelism implementation for real-time H264/AVC video encoder on multicore DSP TMS320C6472

Abstract : In this paper, we exploit the parallelism offered by six-core Digital Signal Processor (DSP) TMS320C6472 to implement the H264/AVC video encoder in order to meet the real-time constraint for different video resolutions. To enhance the encoding speed, GOP Level Parallelism approach is implemented on 5 slave DSP cores. A master core is reserved to manage data transfers among DSP memory and personal computer in order to perform a real-time video encoding demo taken into account video capture and bit-stream storage. Multithreading algorithm and ping-pong buffers technique are used in order to optimize the communication overhead. Experimental results show that our enhanced implementation allows to overcome the real-time constraint by reaching up to 120 f/s (frame/second) for Common Intermediate Format resolution (CIF 352×288) and 35f/s for Standard Definition (SD 720×480). Our proposed approach can save about 80% of run-time for High Definition resolution (HD 1280×720). The Enhanced GOP Level parallelism approach on five DSP cores achieves a good average speedup factor of 4.88 without inducing any quality degradation or bit-rate increment.
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Submitted on : Friday, September 4, 2015 - 3:56:18 PM
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Nejmeddine Bahri, Thierry Grandpierre, Mohamed Ali Ben Ayed, Nouri Masmoudi, Mohamed Akil. GOP level parallelism implementation for real-time H264/AVC video encoder on multicore DSP TMS320C6472. EDERC 2014, IEEE, EURASIP, Nov 2014, Milan, Italy. pp.152-156, ⟨10.1109/EDERC.2014.6924378⟩. ⟨hal-01192779⟩



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