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Conference papers
Efficient Hardware Implementation of Connected Component Tree Algorithm
Eva Dokladalova 1
Author IdHAL : dokladae ORCID : https://orcid.org/0000-0003-1765-7394
Mohamed Akil 1
Author Employer institution : ESIEE Paris IdHAL : mohamed-akil ORCID : https://orcid.org/0000-0001-9029-2163
1
LIGM - Laboratoire d'Informatique Gaspard-Monge (Université de Paris-Est Marne-la-Vallée, Cité Descartes, Bâtiment Copernic, 5 bd Descartes, 77454 Marne-la-Vallée Cedex 2 - France)
- CNRS - Centre National de la Recherche Scientifique : UMR8049 (France)
- Fédération de Recherche Bézout (France)
- ESIEE Paris (2 boulevard Blaise Pascal Cité Descartes BP 99 93162 Noisy-le-Grand Cedex - France)
- ENPC - École des Ponts ParisTech (École des Ponts ParisTech 6-8 avenue Blaise-Pascal Cité Descartes 77455 Champs-sur-Marne Marne-la-Vallée cedex 2 - France)
- UPEM - Université Paris-Est Marne-la-Vallée (5 boulevard Descartes - Champs-sur-Marne - 77454 Marne-la-Vallée Cedex 2 - France)
Document type :
Conference papers
Complete list of metadata
https://hal-upec-upem.archives-ouvertes.fr/hal-00622340
Contributor : Eva Dokladalova Connect in order to contact the contributor
Submitted on : Monday, September 12, 2011 - 1:58:24 PM
Last modification on : Saturday, January 15, 2022 - 3:56:40 AM
Contributor : Eva Dokladalova Connect in order to contact the contributor
Submitted on : Monday, September 12, 2011 - 1:58:24 PM
Last modification on : Saturday, January 15, 2022 - 3:56:40 AM
Identifiers
- HAL Id : hal-00622340, version 1
Citation
Nicolas Ngan, F. Contou-Carrère, B. Marcon, S. Guerin, Eva Dokladalova, et al.. Efficient Hardware Implementation of Connected Component Tree Algorithm. Workshop on Design and Architectures For Signal and Image Processing, 2007, France. 10pp. ⟨hal-00622340⟩
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