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Mots clés

Side-Channel Attacks Loop PUF DRAM Image processing Masking countermeasure Estimation SoC Energy consumption Defect modeling Masking STT-MRAM Spin transfer torque Power demand Cryptography Transistors Robustness Neural networks Security services Computational modeling Hardware security OCaml Protocols Magnetic tunneling Intrusion detection Formal proof FPGA Signal processing algorithms Randomness RSA Machine learning Steadiness Authentication Reverse engineering Writing ASIC Tunneling magnetoresistance Random access memory Power-constant logic Costs Information leakage Convolution Sensors AES Side-channel attacks Magnetic tunnel junction TRNG Countermeasures Aging Logic gates Mutual Information Analysis MIA Temperature sensors Confusion coefficient 3G mobile communication Reverse-engineering Routing Resistance Fault injection attack Receivers Training Elliptic curve cryptography Dual-rail with Precharge Logic DPL Fault injection Formal methods Countermeasure Linearity Field Programmable Gates Array FPGA Dynamic range Asynchronous Coq Differential Power Analysis DPA Side-Channel Analysis SCA SCA Sécurité Circuit faults Field programmable gate arrays CPA CRT Internet of Things Lightweight cryptography MRAM Side-Channel Analysis Filtering Process variation Electromagnetic FDSOI Variance-based Power Attack VPA Security Voltage Side-channel analysis Side-channel attack Simulation Side-channel attacks SCA Differential power analysis DPA Application-specific VLSI designs Switches PUF Security and privacy Hardware GSM Reliability

 

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