Design of DCT_2D toward FPGA

Rostom Kachouri (1) , Mohamed Abid (1) , Chokri Ben Amar (2)

1 CES Lab - Computer & Embedded Systems
2 REGIM-Lab - REsearch Group in Intelligent Machines [Sfax]

Long term objective is to conceive a system on chip of the JPEG coding chain. This article presents the VHDL specification, simulation and also synthesis results, of the two-dimensional discrete cosine transform DCT_2D, which constitutes the first block of the JPEG chain. For that, we kept LOEFLER's algorithm which is the best for the DCT implementation, according to a comparison with other architectures. And we targeted the FPGAs as integration technology. Besides, seeing that the DCT is separable as transformation, the two-dimensional discrete cosine transform (DCT_2D) can be formed by two one-dimensional discrete cosine transform (DCT_1D).

Mots clés: DCT implementation; FPGA; JPEG coding chain; LOEFLER algorithm; VHDL specification; field programmable gate array; hardware description language; joint photographic experts group; one-dimensional discrete cosine transform; two-dimensional discrete cosine transform

Domaines: Informatique [cs]; Systèmes embarqués; Traitement des images [eess.IV]; Architectures Matérielles [cs.AR]

Rostom Kachouri, Mohamed Abid, Chokri Ben Amar. Design of DCT_2D toward FPGA. First IEEE International Symposium on Control, Communications and Signal Processing, ISCCSP’04, Mar 2004, Hammamet, Tunisia. ⟨10.1109/ISCCSP.2004.1296511⟩. ⟨hal-01310007⟩