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Minimizing Latency and Data Memory Requirement for Real-time Chain-Structured Synchronous Dataflow

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https://hal-upec-upem.archives-ouvertes.fr/hal-00620187
Contributor : Serge Midonnet <>
Submitted on : Wednesday, September 7, 2011 - 1:58:37 PM
Last modification on : Wednesday, February 3, 2021 - 7:54:25 AM

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  • HAL Id : hal-00620187, version 1

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Huixue Zhao, Laurent George, Serge Midonnet, Séphane Tassart, Yvan Bourmeyster. Minimizing Latency and Data Memory Requirement for Real-time Chain-Structured Synchronous Dataflow. 2nd IEEE International Symposium on Industrial Embedded Systems (SIES'07), Jul 2007, United States. pp.293-301. ⟨hal-00620187⟩

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